INFO - Pixel FED TTCrx OK (PLL ready, dll ready, frame synced)
INFO - Set up Pixel FED interface #0, base address = 0x11000000, ID = 33
INFO - Writing old DACs to calib/
INFO - Beginning VcThr scan with VCal=250 VCalRange=0
INFO - Beginning VcThr scan for mFEC 7-1 Hub 5 ROC 0; current VcThr is 92
INFO - mFEC 7-1 Hub 5 ROC 0: Plateau is from VcThr = 57 to 131; picking 94
INFO - Beginning VcThr scan for mFEC 7-1 Hub 5 ROC 1; current VcThr is 101
INFO - mFEC 7-1 Hub 5 ROC 1: Plateau is from VcThr = 74 to 129; picking 102
INFO - Beginning VcThr scan for mFEC 7-1 Hub 5 ROC 2; current VcThr is 91
WARN - Warning: hole in plateau at 56
INFO - mFEC 7-1 Hub 5 ROC 2: Plateau is from VcThr = 57 to 127; picking 92
INFO - Writing new DACs to conf/
INFO - CalibrateVcThr complete.